DESIGN VERIFICATION ENGINEER
• Educational Qualifications: BE/BTech/ME/MTech in Electronics/Electrical Engineering.
• Experience: 4-8 Years
• Work Location: Bangalore, Hyderabad
• Experience in SOC/IP/ASIC/GLS Functional Verification
• He/she will be involved in developing testbench for the block/cluster, testcases, test plans and functional and code coverage.
• Knowledge of Industry standard protocols –Ethernet, PCIE, USB, DRR3/4, AXI, AHB and low speed peripherals, etc.
• Knowledge of Clocking, Boot/Reset flows.
• Experience with System Verilog/OVM/UVM SOC development environment is must
• Experience with Low power/UPF verification techniques.
• Strong background in scripting – PERL, TCL, Python.
• Understanding of software and/or hardware validation techniques
Candidate should exhibit:
• Demonstrate excellent Self-motivation, communication, strong problem solving and teamwork skills.
• Set aggressive goals and meet/beat the commitments.
• Flexible enough to work in a dynamic environment and multitask seamlessly.
• Ability to work independently and in a team